Optimal edge termination for high oxide reliability aiming 10kV SiC n-IGBTs

The edge termination design strongly affects the ability of a power device to support the desired voltage and its reliable operation. In this paper we present three appropriate termination designs for 10kV n-IGBTs which achieve the desired blocking requirement without the need for deep and expensive implantations. Thus, they improve the ability to fabricate, minimise the cost and reduce the lattice damage due to the high implantation energy. The edge terminations presented are optimised both for achieving the widest immunity to dopant activation and to minimise the electric field at the oxide. Thus, they ensure the long-term reliability of the device. This work has shown that the optimum design for blocking voltage and widest dose window does not necessarily give the best design for reliability. Further, it has been shown that Hybrid Junction Termination Extension structure with Space Modulated Floating Field Rings can give the best result of very high termination efficiency, as high as 99%, the widest doping variation immunity and the lowest electric field in the oxide

Viable 3C-SiC-on-Si MOSFET design disrupting current Material Technology Limitations

The cubic polytype (3C-) of Silicon Carbide (SiC) is an emerging semiconductor technology for power devices. The featured isotropic material properties along with the Wide Band Gap (WBG) characteristics make it an excellent choice for power Metal Oxide Semiconductor Field Effect Transistors (MOSFETs). Nonetheless, material related limitations originate from the advantageous fact that 3C-SiC can be grown on Silicon (Si) wafers. One of these major limitations is an almost negligible activation of the p-type dopants after ion implantation because the annealing has to take place at relatively low temperatures. In this paper, a novel process flow for a vertical 3C-SiC-on-Si MOSFET is presented to overcome the difficulties that currently exist in obtaining a p-body region through implantation. The proposed design has been accurately simulated with Technology Computer Aided Design (TCAD) process and device software and a comparison is performed with the conventional SiC MOSFET design. The simulated output characteristics demonstrated a reduced on-resistance and at the same time it is shown that the blocking capability can be maintained to the same level. The promising performance of the novel design discussed in this paper is potentially the solution needed and a huge step towards the realisation of 3C-SiC-on-Si MOSFETs with commercially grated characteristics

Physical parameterisation of 3C-Silicon Carbide (SiC) with scope to evaluate the suitability of the material for power diodes as an alternative to 4H-SiC

Major recent developments in growth expertise related to the cubic polytype of Silicon Carbide, the 3C-SiC, coupled with its remarkable physical properties and the low fabrication cost, suggest that within the next five years, 3C-SiC devices can become a commercial reality. It is therefore important to develop Finite Element Method (FEM) techniques and models for accurate device simulation. Furthermore, it is also needed to perform an exhaustive simulation investigation with scope to identify which family of devices, which voltage class and for which applications this polytype is suited. In this paper, we present a complete set of physical models and material parameters for bulk 3C-SiC aiming Technology Computer Aided Design (TCAD) tools. These are compared with those of 4H-SiC, the most well developed polytype of SiC. Thereafter, the newly developed material parameters are used to assess 3C- and 4H-SiC vertical power diodes, P-i-N and Schottky Barrier Diodes (SBDs), to create trade-off maps relating the on-state voltage drop and the blocking capability. Depending on the operation requirements imposed by the application, the developed trade-off maps set the boundary of the realm for those two polytypes. It also allows us to predict which applications will benefit from an electrically graded 3C-SiC power diodes

SiC/Al4SiC4-Based Heterostructure Transistors

A wide-band-gap (WBG) SiC/Al4SiC4 heterostructure transistor with a gate length of 5 μm is designed using a ternary carbide of Al4SiC4, and its performance is simulated by Silvaco Atlas. The simulations use a mixture of parameters obtained from ensemble Monte Carlo simulations, DFT calculations, and experimental data. The 5 μm gate length transistor is then laterally scaled to 2 and 1 μm gate length devices. The 5 μm gate length SiC/Al4SiC4 heterostructure transistor delivers a maximum drain current of 168 mA/mm, which increases to 244 mA/mm and 350 mA/mm for gate lengths of 2 and 1 μm, respectively. The device breakdown voltage is 59.0 V, which reduces to 31.0 V and to 18.0 V in the scaled 2 μm and the 1 μm gate length transistors, respectively. The scaled down 1 μm gate length device switches faster thanks to a higher transconductance of 65.1 mS/mm compared to only 1.69 mS/mm for the 5 μm gate length device. Finally, the subthreshold slope of the scaled devices is 197.3, 97.6, and 96.1 mV/dec for gate lengths of 5, 2, and 1 μm, respectively

Validated physical models and parameters of bulk 3C-SiC aiming for credible technology computer aided design (TCAD) simulation

The cubic form of SiC (β- or 3C-) compared to the hexagonal α-SiC polytypes, primarily 4H- and 6H–SiC, has lower growth cost and can be grown heteroepitaxially in large area silicon (Si) wafers which makes it of special interest. This in conjunction with the recently reported growth of improved quality 3C–SiC, make the development of devices an imminent objective. However, the readiness of models that accurately predict the material characteristics, properties and performance is an imperative requirement for attaining the design and optimization of functional devices. The purpose of this study is to provide and validate a comprehensive set of models alongside with their parameters for bulk 3C–SiC. The validation process revealed that the proposed models are in a very good agreement to experimental data and confidence ranges were identified. This is the first piece of work achieving that for 3C–SiC. Considerably, it constitutes the necessary step for finite element method simulations and technology computer aided design

On the suitability of 3C- Silicon Carbide as an alternative to 4H- Silicon Carbide for power diodes

Major recent developments in growth expertise related to the cubic polytype of Silicon Carbide, the 3C-SiC, coupled with its remarkable physical properties and the low fabrication cost, suggest that within the next years, 3C-SiC devices can become a commercial reality. Inevitably, a comparison to the most well developed polytype of SiC, the 4H-SiC, should exist. It is therefore important to develop Finite Element Method (FEM) techniques and models for accurate device design, analysis and comparison. It is also needed to perform an exhaustive investigation with scope to identify which family of devices, which voltage class and for which applications this polytype is best suited. In this work, we validate the recently developed Technology Computer Aided Design (TCAD) material models for 3C-SiC and those of 4H-SiC with measurements on power diodes. An excellent agreement between measurements and TCAD simulations was obtained. Thereafter, based on this validation, 3C- and 4H-SiC vertical power diodes are assessed, to create trade-off maps. Depending on the operation requirements imposed by the application, the developed trade-off maps set the boundary of the realm for those two polytypes and allows to predict which applications would benefit once electrically graded 3C-SiC becomes available

>10kV 4H-SiC n-IGBTs for Elevated Temperature Environments

In this work we explore the appropriate design parameters which will enable the fabrication of a >10kVn-Channel IGBT. In particular, we emphasize the reduction of device blocking capabilities for high temperature environments. Moreover, this work shows that the SiC device design optimization methodology needs to be rethought to account for the significant loss of blocking voltage at the desired elevated operating temperatures. Indeed, device design engineers aiming to optimize a SiC IGBT should design at high temperature and not at room temperature

Hybrid Silica Xerogel and Titania/Silica Xerogel Dispersions Reinforcing Hydrophilicity and Antimicrobial Resistance of Leathers

Four leather substrates from different animals were treated by dispersions containing hydrophilic composite silica-hyperbranched poly(ethylene imine) xerogels. Antimicrobial activity was introduced by incorporating silver nanoparticles and/or benzalkonium chloride. The gel precursor solutions were also infused before gelation to titanium oxide powders typically employed for induction of self-cleaning properties. The dispersions from these biomimetically premade xerogels integrate environmentally friendly materials with short coating times. Scanning electron microscopy (SEM) provided information on the powder distribution onto the leathers. Substrate and coating composition were estimated by infrared spectroscopy (IR) and energy-dispersive X-ray spectroscopy (EDS). Surface hydrophilicity and water permeability were assessed by water-contact angle experiments. The diffusion of the leather’s initial components and xerogel additives into the water were measured by Ultraviolet-Visible (UV-Vis) spectroscopy. Protection against GRAM- bacteria was tested for Escherichia coli, Pseudomonas aeruginosa, and Klebsiella pneumoniae against GRAM+ bacteria for Staphylococcus aureus and Enterococcus faecalis and against fungi for Candida albicans. Antibiofilm capacity experiments were performed against Staphylococcus aureus, Klebsiella pneumoniae, Enterococcus faecalis, and Candida albicans. The application of xerogel dispersions proved an adequate and economically feasible alternative to the direct gel formation into the substrate’s pores for the preparation of leathers intended for medical uses